Design for test (DFT) has been around since the 1960s. The technology was developed to reduce the cost of creating a successful test for an IC. Scan design, fault models, and automatic test pattern ...
In recent years, boundary scan has transformed itself. JTAG started more than a decade ago as a simple structural interconnect test technology. It now is a foundational embedded infrastructure capable ...
For decades, process and design scaling has triggered the adoption of transformative test solutions. About twenty years ago, when at-speed test became a de-facto requirement, on-chip compression ...
Some new design-for-test (DFT) technologies are difficult, expensive, or risky to implement but offer significant benefits. Other technologies are easy to implement but offer minor improvements. The ...
Steven Kawamoto, Sr. Marketing Manager, Custom LSI Solutions Unit, Gaku Ogura, Sr. Marketing Manager, Design Solutions Center, Richard Lee, Design Engineer, Design ...
Test cost is becoming a major issue in chip design. That should surprise no reader of ISD. What might be surprising is the severity of the problem. Not only are test costs threatening to become the ...
Meridian DFT (Design For Test) from Real Intent delivers multimode design-for-test (DFT) static sign-off to ensure maximum scan coverage and silicon s ...
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