Many small and large design teams use third-party IP (intellectual property) to accelerate SOC (system-on-chip) design by importing functional blocks, such as data converters, PLLs, Ethernet PHY ...
SANTA CLARA, Calif. — Engineers are struggling with old and new signal integrity issues as they drive toward designs in the 5 to 10 Gbit/s range, according to a panel of experts at DesignCon. The ...
DesignCon concluded last week in Santa Clara, with vendors having exhibited a variety of design, simulation, test, and measurement tools. A key focus was ensuring signal integrity on high-speed serial ...
SANTA CLARA, Calif.--(BUSINESS WIRE)--SiSoft today announced new Signal Integrity, SerDes, and Mixed-Signal design solutions developed jointly with MathWorks which will be on display this week at ...
Check out more coverage of DesignCon 2023. This article is also part of TechXchange: PCB Tools and Technology. In electronic systems, electrical signals tend to travel through a wide range of ...
Signal integrity (SI) is at the forefront of SoC and system designers’ thinking as they plan for upcoming high-speed GDDR6 DRAM and PHY implementations for automotive and advanced driver assistance ...
Leading-edge chip desiLeading-edge chip design was never easy, but it’s getting harder all the time. Rapid advances in communication systems are driving data rates higher. With the emergence of ...
Signal integrity is a critical design consideration in modern electronic systems, particularly those that depend on high-speed interconnects. As data rates climb and interconnect geometries become ...
Signal integrity (SI) and power integrity (PI) are two distinct but related realms of analysis concerned with proper operation of digital circuits. In signal integrity, the main concern is making sure ...
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